Embedded System Friendly GPS Receiver by Orientable AI








A high-performance GNSS library and application provided by Orientable AI.
๐ Documentation
The full documentation, including installation guides, configuration manuals, and architectural overviews, is available at:
๐ Read the Documentation (Or build the MkDocs site locally)
โก Quick Start
1. Build
mkdir build && cd build
cmake ..
make -j$(nproc)
2. Run
# Run headless (CLI)
./orientable-libgnss-cli ../cfg/orientable-libgnss.yaml
# Run modern GUI (Qt6 or GTK4)
./orientable-libgnss-qt6 ../cfg/orientable-libgnss.yaml
./orientable-libgnss-gtk4 ../cfg/orientable-libgnss.yaml
Note: The log/ and output/ directories will be automatically generated in your current working directory if they do not exist.
โจ Key Features
- Zero-Allocation Signal Path: Optimized high-frequency loops (acquisition/tracking) use pre-allocated scratch buffers for maximum performance and deterministic timing.
- Two-Stage Acquisition: Coarse FFT-based parallel code-phase search followed by fine frequency estimation (40 ms coherent integration with nav-bit-edge hypothesis testing) for ~6 dB sensitivity improvement.
- VSM C/Nโ Estimation: Carrier-to-noise density ratio computed using the Variance Summing Method (Van Dierendonck et al.), providing front-end-independent signal quality metrics.
- Carrier Lock Detection & Cycle-Slip Flagging: Normalized phase discriminator lock indicator with Doppler-predicted vs. measured carrier phase comparison for cycle-slip detection. LLI flags propagated to RINEX output.
- Lock-Free Synchronization: High-concurrency buffer management using proper C11
stdatomic.h thread-safe operations to minimize thread contention.
- Highly Optimized Math: Replaced FFTW3 with PFFFT for superior performance and simpler licensing, coupled with manual AVX2 and NEON SIMD intrinsics for vector math.
- Hardware-Accelerated Viterbi Decoding: Includes both SSE2 and newly ported ARM NEON accelerated Viterbi(2,7) decoders for fast convolutional FEC decoding on multiple architectures.
- Cache-Aligned Memory: Employs 64-byte memory alignment (via
posix_memalign) to prevent false sharing and optimize multi-core cache performance.
- Modular MAC/PHY Architecture: Clean separation between Physical Layer (PHY) signal processing and Media Access Control (MAC) navigation message decoding.
- Broad Hardware Support: Native drivers for RTL-SDR, BladeRF, SiGe GN3S, and NSL Stereo.
- Hardened Security: Bounded string operations and comprehensive error checking throughout the core engine.
๐งช Testing
The project includes a comprehensive unit test suite powered by GoogleTest.
# From the build directory
ctest --output-on-failure
For notes on receiver integration testing against SDR generators (like libgnss-tx-swift), please see the Integration Testing and Bug Fixes document.
๐ค Contributing
Please read our Contributing Guidelines to get started.
๐ License
This project uses a mixed licensing model:
- Core Library & CLI: Licensed under the GNU General Public License v3.0.
- GUI Components & Specific Core Modules: Proprietary (All Rights Reserved).
See the LICENSE.md file for full details.